A transresistance amplifier is an amplifier which supplies an output voltage signal in proportion to an input current signal. The transfer function of a transresistance amplifier is e.sub.o /I.sub.m =R.sub.m where R.sub.m is the transresistance. Ideally, a transresistance amplifier achieves high speeds while simultaneously preventing excess power dissipation.
An important factor affecting the level of power dissipation in an amplifier is the characteristics of the integrated circuit transistors which form the amplifier. Integrated circuit fabrication processes introduce unavoidable "process" variations which the amplifier designer must anticipate and compensate for. Transistors fabricated on different silicon wafers and/or on different dice fabricated from a single wafer inevitably exhibit process variations which affect the transistors' operating characteristics. For example, process variations may result in differences in the propagation delays of electronic signals processed through separate, supposedly "identical" circuits. The propagation delay of a switching element in a "slow" process can be approximately double that in a "fast" process. In this context, a "slow" process is a fabrication process which yields switching elements exhibiting significantly greater propagation delays than those exhibited by switching elements fabricated in a "fast" process.
Propagation delays also change with variations in power supply levels, since the operating points of integrated circuit devices fluctuate as power supply levels change. Accordingly, power supply changes can also affect the power consumption of the circuitry. The term "fast process/supply corner" is used herein to characterize variations exhibited by devices of atypically high conductivity and/or devices which must endure atypically high power supply levels (which are nevertheless within acceptable limits). Similarly, the term "slow process/supply corner" is used herein to characterize variations exhibited by devices of atypically low conductivity and/or devices which must endure atypically low power supply levels (which are nevertheless within acceptable limits).
In addition to affecting propagation delay, process variations can also affect the power dissipated by a circuit, since they directly affect the conductivities of the devices which make up a circuit. Designing an amplifier incorporating devices having predefined speed and power characteristics is problematic, in that the designer must make the devices large and fast enough to satisfy the speed constraint at the slowest possible process corner, while enduring increased power consumption at the fastest, most "power-hungry" process corner.
U.S. Pat. No. 5,708,385 Shou et al discloses a typical transresistance amplifier. Shou et al provide a plurality of series-connected inverters, with a feedback resistor coupled between the output of the last inverter stage and the input of the first inverter stage. Considerable "crowbar current" flows through the cascaded inverters, resulting in unwanted power dissipation. (Crowbar current is somewhat analogous to the current characteristic of a crowbar overvoltage protection circuit as is commonly used in power electronics to rapidly short circuit a power supply by placing a low resistance shunt across the power supply output terminals if a predetermined voltage threshold is exceeded.) The Shou et al cascaded inverter structure is comparable to a stack of two MOS diodes between the supplies. Considerable crowbar current (several milliamps) flows through such a structure. The present invention significantly reduces the effect of such current on the power supplies, minimizing unwanted power dissipation.
More particularly, at zero input current, the operating point of the Shou et al circuit is at the switching threshold of the inverter circuit. This causes considerable crowbar current to flow through the inverters, resulting in undesirable power dissipation. Further, to achieve significant speed and drive strength at the slow process/supply corner, the dimensions of the integrated circuit transistors forming each inverter must exceed some calculable minimum values. But, transistors which satisfy such dimensional constraints exhibit undesirable power dissipation at the fast process/supply corner.
U.S. Pat. No. 5,331,295 Jelinek et al discloses a technique for limiting current flow through a plurality of series-connected complementary-symmetry metal-oxide-semiconductor ("CMOS") field effect transistor inverters. A current control "starvation" transistor is coupled above and below each inverter. The starvation transistors effectively reduce the power supply voltage seen by the inverters and can be used to vary the signal propagation delay through the series-cascaded inverters. A higher power supply voltage seen by the inverters tends to reduce the propagation delay through them. This property is exploited by Jelinek et al to tune the oscillator frequency. However, the circuit of Jelinek et al does not provide transresistance functionality. Even if, as taught by Shou et al, a feedback resistor were provided in the circuit of Jelinek et al, such circuit would still not provide transresistance functionality, due to the current source operation of the starvation transistors, which would lower the voltage gain of the inverters.
The present invention provides a transresistance amplifier which overcomes the foregoing disadvantages.